| System | The system being measured. |
| Machine Type | The machine type |
| CPU Type | CPU type (CP, zIIP etc.) |
| CPI | Cycles per Instruction. The average number of machine cycles to execute 1 instruction. |
| MIPS | Millions of Instructions Per Second. The number of instructions executed per second of CPU time. |
| L1MP | Level 1 Miss Per 100 Instructions. The number of times required data or instructions were not in the processor level 1 cache, per 100 instructions. |
| RNI | Relative Nest Intensity. A relative measurement of the cost of sourcing data and instructions from cache and memory, when they were not in the Level 1 cache. Calculated using processor specific formulas published by IBM. |
| Workload Hint | LSPR workload hint. Derived from the L1MP and RNI using the table published by IBM. Can be Low, Average or High. |
| L15P | Percent of level 1 misses sourced from the level 1.5 cache (z10). |
| L2P | Percent of level 1 misses sourced from the level 2 cache (z196/zEC12/z13). |
| L2LP | Percent of level 1 misses sourced from the level 2 cache on the same book. (z10) |
| L2RP | Percent of level 1 misses sourced from the level 2 cache on a different book. (z10) |
| L3P | Percent of level 1 misses sourced from the level 3 cache (z196/zEC12/z13). |
| L4LP | Percent of level 1 misses sourced from the level 4 cache on the same book (z196/zEC12/z13). |
| L4RP | Percent of level 1 misses sourced from the level 4 cache on a different book (z196/zEC12/z13). |
| MEMP | Percent of level 1 misses sourced from memory. |
| Prb State | Percentage of instructions executed in problem state. |
| Finite CPI | Estimated Cycles Per Instruction resulting from a finite level 1 cache i.e. the cycles to source data from other cache levels or memory, per instruction. |
| Complexity CPI | Estimated Cycles Per Instruction if there was infinite level 1 processor cache i.e. the cycles per instruction attributable to complexity of the instructions being executed. |